Bluestone Global Tech (BGT) announces the addition of 24”x300” graphene films to their Grat-FilmTM product line. This marks the pioneering firm as ‘first-to-win’ in the race to avail graphene in sizes and volumes useful for industrial application.
ProPlus Design Solutions, Inc., the global leader for SPICE modeling solutions and the leading technology provider for design for yield (DFY) applications, expanded its business in 2012 to offer a fully integrated DFY product portfolio.
Cadence Design Systems, Inc., a leader in global electronic design innovation, announced today that GLOBALFOUNDRIES has certified essential Cadence® technologies for custom/analog, digital and mixed-signal design, implementation, and verification for its 20-nanometer LPM technology. The certification covers the Virtuoso and Encounter platforms, including the industry-standard SKILL process design kit (PDK).
GLOBALFOUNDRIES and Synopsys, Inc., a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today announced the two companies have partnered to deliver a comprehensive design solution to accelerate the implementation of GLOBALFOUNDRIES’ 14 nm-XM FinFET offering.
Cadence Design Systems, Inc., a leader in global electronic design innovation, announced today that two of its major foundry partners -- Samsung Foundry and GLOBALFOUNDRIES -- are supporting new Cadence® custom/analog technology targeting designs at the advanced nodes of 20 and 14 nanometers. The two foundries are providing SKILL-based process design kits (PDKs) for the newly introduced Cadence Virtuoso® Advanced Node.
Technische Universität (TU) Dresden, a leading German university in the field of electrical engineering, today announced the successful initial operation of a low-power test chip featuring a Tensilica Xtensa LX4 DSP equipped with RacyICs power management IP implemented in GLOBALFOUNDRIES' advanced 28nm Super Low Power (SLP) technology.
Five University of California, Riverside professors will receive a total of $5 million as part of a $35 million research center aimed at developing materials and structures that could enable more energy efficient computers, mobile phones, and other electronic devices.
Cadence will showcase its joint development of advanced design technologies in partnership with the Common Platform Alliance (Samsung Electronics, IBM, and GLOBALFOUNDRIES) at the Common Platform Technology Forum on Feb. 5. Attendees can learn more about 20-nanometer and 14-nanometer FinFET standard cell and IP design, physical implementation, and extraction, timing and power signoff, as well as recent 14-nanometer tapeouts in which Cadence was involved.
Scientists from the University of Cambridge have created, for the first time, a new type of microchip which allows information to travel in three dimensions. Currently, microchips can only pass digital information in a very limited way - from either left to right or front to back. The research was published today, 31 January, in Nature.
Veeco Instruments Inc. announced today that Philips Innovation Services, a service provider within Royal Philips Electronics N.V., has recently qualified a NEXUS® Physical Vapor Deposition (PVD) System at its location on the High Tech Campus Eindhoven, Netherlands. This system will support Philips Innovation Services’ capabilities in a broad range of thin film device applications, including MEMS, sensors, nano-electronics and others.
Terms
While we only use edited and approved content for Azthena
answers, it may on occasions provide incorrect responses.
Please confirm any data provided with the related suppliers or
authors. We do not provide medical advice, if you search for
medical information you must always consult a medical
professional before acting on any information provided.
Your questions, but not your email details will be shared with
OpenAI and retained for 30 days in accordance with their
privacy principles.
Please do not ask questions that use sensitive or confidential
information.
Read the full Terms & Conditions.