Feb 16 2010
Silicon nanowires are a leading candidate for use in next-generation transistors because they allow for high densities and speeds, as well as low operating power. Numerical modeling is a key part of nanowire transistor design. However, the modeling of capacitance, an important transistor characteristic, has so far been based on semi-classical physics, rather than quantum physics. Now, Sai Kong Chin of the A*STAR Institute of High Performance Computing and co-workers at A*STAR and the National University of Singapore have developed a rigorous two-dimensional quantum model of the 'gate-all-around' nanowire configuration, leading to a better match with experimental data and highlighting the importance of quantum effects.
In nanowire transistors, the nanowire forms a channel through which current flow is controlled by a gate electrode. The best control has been demonstrated for the gate-all-around configuration, in which the gate wraps around the nanowire. The degree of gate control is critical to transistor function, and is determined in part by the nanowire capacitance.
Accurate modeling of capacitance requires consideration of the quantum behavior of the wave-like electrons inside the nanowire, which Chin and co-workers accomplished by applying the Schrödinger–Poisson equation to the problem. They calculated the capacitance of the nanowire as a function of the gate electrode voltage, and compared the result to experimental measurements for nanowires of 9–10 nanometers in radius.
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