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STATS ChipPAC Dedicated to Development of Next Generation Wafer Level Integration with TSV Technology

STATS ChipPAC recently declared that it is extending its 300mm Through Silicon Via (TSV) portfolio with the addition of mid-end production capabilities.

TSV is a technology that uses short vertical interconnections via a silicon wafer to help develop a space efficient system that displays high interconnect densities. It can be used with microbump bonding and flip chip technology to facilitate better functions in nanosize. It is used as silicon interposers to convert two-dimensional  silicon forms into three-dimensional configurations. TSV interposers offer smooth incorporation of the die from multiple technologies to deliver miniaturization, thermal performance and fine line /width spacing in a semiconductor.

The technology is able to offer 200mm wafers and chip-to-chip and chip-to-wafer assembly options, including high density microbump features in solder and copper columns. It also offers microbump attaching to 40um pitch, thin wafer handling and dicing and wafer level underfill for flip chip interconnection.

The mid-end process flow takes place between the wafer creation and back-end fabrication. The mid-end procedure answers the production needs of 2.5D and 3D TSV, besides wafer level packaging, embedded die and flip chip technology.

According to Dr. Han, flip chip and wafer level packaging are necessary for mid-end processing. The technology could be applied in portable systems and computer systems.

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