Posted in | News | Nanoanalysis | Nanobusiness

Collaboration to Provide Verification Platform for Integrated Circuits

Tanner EDA, a company that provides layout, design, and verification of mixed-signal and analog integrated circuits (ICs), and Berkeley Design Automation, a company that provides verification of nanometer circuits, are joining hands to provide the Analog FastSPICE (AFS) Platform from Berkeley Design Automation for the HiPer Silicon design suite manufactured by Tanner EDA.

Designers of mixed-signal, RF, and analog circuits require high circuit capacity and simulation performance with nanometer SPICE accuracy. The AFS Platform integrates well with the HiPer Silicon full-flow design suite to offer nanometer SPICE precision, which is 5 to 10 times more rapid than conventional single-core SPICE simulators. The integration will help Tanner EDA users to evaluate the complex analog/RF circuits using innovative nanometer CMOS technologies. Tanner EDA will showcase the integrated flow at the 48th Design Automation Conference (DAC) from June 6-8, 2011 in San Diego, California at the San Diego convention center.

The AFS Platform can be used to evaluate nanometer RF, analog, custom digital and mixed-signal circuits. Tanner EDA’s HiPer Silicon full-flow design suite provides designers with a comprehensive analog design flow from stages such as circuit simulation, schematic capture, physical layout and verification, and waveform probing.

HiPer Silicon comprises a new database for management and storage of simulation data. It also includes HiPerDevGen that delivers advanced device and structure generation to improve layout productivity. It comprises a complete remodeling of the waveform editor product called as W-edit to equip designers with a signal analysis platform instead of simple layout views.

Citations

Please use one of the following formats to cite this article in your essay, paper or report:

  • APA

    Chai, Cameron. (2019, February 12). Collaboration to Provide Verification Platform for Integrated Circuits. AZoNano. Retrieved on November 21, 2024 from https://www.azonano.com/news.aspx?newsID=22615.

  • MLA

    Chai, Cameron. "Collaboration to Provide Verification Platform for Integrated Circuits". AZoNano. 21 November 2024. <https://www.azonano.com/news.aspx?newsID=22615>.

  • Chicago

    Chai, Cameron. "Collaboration to Provide Verification Platform for Integrated Circuits". AZoNano. https://www.azonano.com/news.aspx?newsID=22615. (accessed November 21, 2024).

  • Harvard

    Chai, Cameron. 2019. Collaboration to Provide Verification Platform for Integrated Circuits. AZoNano, viewed 21 November 2024, https://www.azonano.com/news.aspx?newsID=22615.

Tell Us What You Think

Do you have a review, update or anything you would like to add to this news story?

Leave your feedback
Your comment type
Submit

While we only use edited and approved content for Azthena answers, it may on occasions provide incorrect responses. Please confirm any data provided with the related suppliers or authors. We do not provide medical advice, if you search for medical information you must always consult a medical professional before acting on any information provided.

Your questions, but not your email details will be shared with OpenAI and retained for 30 days in accordance with their privacy principles.

Please do not ask questions that use sensitive or confidential information.

Read the full Terms & Conditions.