Semiconductor Manufacturing International (SMIC) and Brite Semiconductor, Shanghai has declared that they have reached first-pass silicon success with the first 40 nm chip of Brite by deploying 40 nm process technology of SMIC.
The 40 nm chip has been independently designed and is a result of Brite's collaboration with Synopsys and SMIC. It incorporates SMIC's I/O IP and PLL and Synopsys' DesignWare standard cell libraries and embedded memory. Successful design execution validates Brite's back-end and front-end design flows on 40 nm systems.
Dr. Charlie Zhi, CEO of Brite Semiconductor stated that the excellent design team and their methodology have led to the first-pass silicon success of their 40nm chip.
Robert Li, General Manager of Synopsys, China, stated that the first-pass silicon success of this new 40 nm chip developed by Brite reveals the effort of its team and certifies Synopsys' reference design flow on SMIC's 40 nm superior technology. The collaboration between Brite and Synopsys helps offer clients with products that improve design tape-out, he added.
Chris Chi, Senior Vice President and Chief Business Officer of SMIC said that this collaboration illustrates the potential of SMIC's 40 nm superior technology to provide strong support to leading-edge designs.