Nanoelectronics News

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Cadence Innovus Implementation System Helps Spreadtrum Reduce Turnaround Time of Multi-Million-Cell 28nm IP Block

Cadence Design Systems, Inc. today announced that Spreadtrum Communications (Shanghai) Co., Ltd. utilized the new Cadence® Innovus™ Implementation System to dramatically reduce the turnaround time of a multi-million-cell 28-nanometer (nm) intellectual property (IP) block while delivering to its power, performance, and area (PPA) goals. Spreadtrum’s TAT for this IP block was reduced significantly while meeting the original PPA targets compared to its previous solution.

From Cadence Design Systems 13 Mar 2015

DATE 2015: CEA-Leti to Present Newest Version of Leti-UTSOI2 for UTBB-FDSOI Technology

CEA-Leti today announced the newest version of its advanced compact model for UTBB-FDSOI technology is now available in all major SPICE simulators.

From CEA-Leti 12 Mar 2015

Nano-Earthquakes Could Help Control Properties of 2D Materials

The performance of mobile phone cameras and solar cells could be boosted by “nano-earthquakes”, researchers have found.

12 Mar 2015

Innovative Fabrication Technique for Hybrid Nanostructure Supercapacitor Electrode

As a novel energy storage device, supercapacitors have attracted substantial attention in recent years due to their ultra-high charge and discharge rate, excellent stability, long cycle life and very high power density. Imagine charging your cell phone in just a few seconds or fueling up an electric car in but a few minutes, which are both part of the promising future that supercapacitors could offer.

12 Mar 2015

Juniper Networks Improves TAT for 28nm IP Implementation for Networking Applications with Cadence Innovus

Cadence Design Systems, Inc. today announced that Juniper Networks has utilized Cadence® Innovus™ Implementation System to improve turnaround time (TAT) for physical implementation of their most complex 28-nanometer (nm) intellectual property (IP) for networking applications. The networking company was able to achieve throughput of more than 1.8 million cells per day while also improving out-of-the-box design performance by 15 percent.

From Cadence Design Systems 12 Mar 2015

Uniquify Selected by Nufront as DDR IP Provider for 28nm SoC Project

Uniquify, a leading high-performance semiconductor intellectual property (IP) and system-on-chip (SoC) integration and manufacturing services supplier, today announced an agreement with Nufront of Beijing, China, to provide a high-performance DDR subsystem IP solution that supports DDR4, DDR3, LPDDR3 and LPDDR2 protocols.

12 Mar 2015

Freescale® Achieves 7X Turnaround Time Gain on Multiple 28nm Designs with Cadence® Innovus™ Implementation System

Cadence Design Systems, Inc. today announced that Freescale® Semiconductor has achieved a 7X gain in turnaround time with Cadence® Innovus™ Implementation System over its previous production environment while maintaining its quality of results.

From Cadence Design Systems 12 Mar 2015

MaxLinear Utilizes Cadence® Innovus™ Implementation System on Multi-Million Instance 28nm Chip

Cadence Design Systems, Inc. today announced that MaxLinear, Inc. used the Cadence® Innovus™ Implementation System on a multi-million instance 28 nanometer chip, significantly improving both area and turnaround time.

From Cadence Design Systems 11 Mar 2015

CEA-Leti Launches Silicon Impulse IC Design Competence Center

CEA-Leti today announced the launch of its Silicon Impulse IC design competence center, a comprehensive IC technology platform offering IC design, advanced intellectual property, emulator and test services along with industrial multi-project wafer (MPW) shuttles.

From CEA-Leti 11 Mar 2015

HiSilicon Technologies Deploys Synopsys Platform for FinFET Designs Targeting TSMC's 16nm Technology

Synopsys, Inc. today announced that HiSilicon Technologies, a leading provider for telecom network, wireless terminal and digital media chipset solutions, has broadly deployed Synopsys' Galaxy™ Design Platform for the implementation of ARM® Cortex®-A72, Cortex -A57 and Cortex -A53 processor-based FinFET designs targeting TSMC's 16-nanometer (nm) process technology.

From Synopsys, Inc. 11 Mar 2015

Nanoelectronics News

Cadence Innovus Implementation System Helps Spreadtrum Reduce Turnaround Time of Multi-Million-Cell 28nm IP Block

DATE 2015: CEA-Leti to Present Newest Version of Leti-UTSOI2 for UTBB-FDSOI Technology

Nano-Earthquakes Could Help Control Properties of 2D Materials

Innovative Fabrication Technique for Hybrid Nanostructure Supercapacitor Electrode

Juniper Networks Improves TAT for 28nm IP Implementation for Networking Applications with Cadence Innovus

Uniquify Selected by Nufront as DDR IP Provider for 28nm SoC Project

Freescale® Achieves 7X Turnaround Time Gain on Multiple 28nm Designs with Cadence® Innovus™ Implementation System

MaxLinear Utilizes Cadence® Innovus™ Implementation System on Multi-Million Instance 28nm Chip

CEA-Leti Launches Silicon Impulse IC Design Competence Center

HiSilicon Technologies Deploys Synopsys Platform for FinFET Designs Targeting TSMC's 16nm Technology

Nanopore-Based Sensor Enables Rapid and Precise Disease Diagnosis

Combining Nanofluids and Turbulators for Sustainable Energy

Multiscale Force Sensing with Photon-Avalanching Nanocrystals

Novel Method for Producing Superior Carbon Nanofibers via Additive Nanostructuring

Optimizing Methylene Blue Removal with Bovine Serum Albumin Nanoparticles

Conversations on AFM: Applications of BioAFM in Life Science

Conversations on AFM: The Technology and History Behind AFM and SPM

Recent Advances in High-Speed Atomic Force Microscopy to Improve Research Into Protein Dynamics

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