Jun 16 2010
CLK Design Automation Inc today announced that it has delivered a range of high accuracy timing solutions for TSMC Reference Flow 11.0, and as part of TSMC’s 40nm solution. Amber Path FX™ has been validated by TSMC for SBOCV Table Characterization. Amber Path FX™ has also met TSMC’s requirement as a Fast SPICE accurate timing and variance analysis for TSMC’s 40nm high performance (G) and low-power (LP) technologies.
"CLK Design Automation’s Amber Path FX uniquely addresses critical requirements of Reference Flow 11.0, and deliver robust solution for high performance designs,” said Tom Quan, Deputy Director of Design Service Marketing at TSMC. “With close collaboration between the two companies, Amber Path FX now supports SBOCV Table Characterization in Reference Flow 11.0 and provides a Fast SPICE accurate delay and variance path based timing solution for 40nm process node."
Amber Path FX is the industry’s first Fast SPICE based Path Timing solution for high accuracy delay and variation analysis. Amber Path FX uses transistor level modeling to deliver SPICE accurate delay and statistical timing analysis for nanometer semiconductor designs, benefit in 100,000x faster than traditional Monte Carlo SPICE simulation approaches with mean error within 5% and sigma error within 10% compared to Monte Carlo simulations. Amber Path FX complements PrimeTime™ and PrimeTime SI™, seamlessly extending traditional STA with Transistor Statistical Static Timing Analysis (TSSTA).
Amber Path FX uses its Fast SPICE based Path Timing for high accuracy SBOCV Table Generation. With its breakthrough Variance Solver, Amber Path FX generates SBOCV Tables in a fraction of the time required by traditional Monte Carlo SPICE simulation approaches. These SBOCV Tables can be used with any Static Timing Analysis tool that has been validated for SBOCV as part of TSMC’s Reference Flow 11.0.
"Our Reference Flow 11.0 SBOCV Characterization and 40nm qualifications with TSMC are important milestones for CLK," said Isadore Katz, president and CEO of CLK Design Automation. "By working closely with TSMC, we have been able to deliver a solution with unprecedented performance and accuracy for characterization and verification of leading edge designs."
Nanometer Designs are Sacrificing Performance, Area and Power
Because of the inherent process variation in nanometer manufacturing processes, designers are sacrificing performance, area and power. Traditional corner based static timing methods are too pessimistic, and existing statistical solutions are impractical and inaccurate. Monte Carlo SPICE is so slow that only a handful of potential timing violations or power savings can be evaluated. The result is that customers are not realizing the full benefit of TSMC’s manufacturing capabilities. Estimates are that > 10% or more of the performance and power of 40nm is left on the table by using corner-based approaches.
Benefits of SBOCV
Stage Based OCV (SBOCV) helps with timing closure by reducing the pessimism inherent to corner based timing approaches. SBOCV is an enhanced version of on chip variation (OCV) de-rating for static timing analysis. OCV reduces the pessimism by using SPICE derived tables to better model manufacturing variation. SBOCV enhances OCV by including the depth of the logic in both the clock and data path. The depth of the logic, or stages, helps to take into account local on-die variation uniquely from global die to die variation
Benefits of Amber Path FX for SBOCV Table Generation
Amber Path FX can generate SBOCV tables for any STA tool that support SBOCV in a fraction of the time required by SPICE or Fast SPICE with no loss in accuracy. For example, Amber Path FX generated tables for 4 corners in 10 minutes. This required cell characterization of 2.8 hours, and delivered tables that works with STA tools including PrimeTime™, ETS, Amber™ (note: format translation required for ETS). By way of comparison, the traditional Monte Carlo SPICE approach takes 3 weeks using 120 commercial SPICE licenses
Amber Path FX: Fast SPICE delay and variance solution for TSMC’s 40nm PrimeTime Users
Amber Path FX has been validated by TSMC for its 40nm libraries, and engineers can evaluate full chip designs with Fast SPICE accuracy for delay and variance. 1000's of paths per hour can be timed with near SPICE Monte Carlo accuracy. Alternatively, Amber Path FX can be used non-statistically to time 100,000's of paths per hour to get near SPICE accuracy for corner based timing runs. Amber Path FX can automatically read in and analyze all the critical paths from PrimeTime™ and PrimeTime SI™. Variance and delay results are presented in easy to review reports or SDF, and no changes are required to existing design environments or scripts.
Source: http://www.clkda.com/