Nov 10 2010
ARM today announced their newest optimization package for the ARM® Cortex™-A9 processor, targeting Samsung 32nm LP High-K Metal Gate (HKMG) process technology.
This ARM Processor Optimization Pack (POP) provides a highly tuned foundation for implementing Cortex-A9 processors in low power, mobile applications. Based on ARM Artisan® optimized logic and memory physical IP, the POP is also supported by implementation knowledge and ARM benchmarking, providing a rich foundation for leading edge System-on-Chip (SoC) designs. The Processor Optimization Pack enables operation over 1 GHz, and is available for immediate licensing from ARM.
Earlier this year ARM designed a dual-core test chip implementation of the Cortex-A9 processor targeting Samsung’s 32nm LP process using the Cortex-A9 Processor Optimization Pack, to evaluate the POP’s capabilities. The resulting test chip was manufactured by Samsung; the silicon is functional and now being tested by ARM where operation at up to 1.6GHz under nominal conditions has been observed.
“Mobile SoC designs are requiring not only low-power but higher performance for the increasing range of applications now available to mobile users,” said Jay Min, vice president business development for Samsung Foundry and ASIC. “We are pleased to see the powerful combination of Samsung’s 32nm LP HKMG process with ARM cores and physical IP to provide the highest levels of energy efficiency and performance in next generation SoC platforms.”
“ARM has pushed the envelope to deliver a unique enhanced physical IP product that highlights the compelling advantages of Samsung 32nm HKMG technology”, says John Heinlein, vice president of marketing, ARM Physical IP Division. “Through this package, which features ARM Artisan physical IP to accelerate critical paths in the design, we are delivering a platform that enables the most advanced mobile chips in the industry”
ARM designers will present their experiences from this implementation project at the ARM 2010 Technology Conference, in the session titled “Proven Methodologies for Cortex-A9 Implementation >1 GHz”, held on Tuesday, November 9, 2010, 1:45pm — 2:35pm in Santa Clara, CA.
Source: http://www.arm.com/