Synopsys, a global provider of IP and software for semiconductor design, verification and production, has collaborated with TSMC to design a broad range of DesignWare interface PHY IP such as SATA, DDR, PCI Express, HDMI, SuperSpeed USB 3.0 and USB 2.0 besides implanted memories for TSMC's 28 nm process technology.
The partnership helps designers integrate more features into system-on-chips (SoCs), with power-efficient and compact-sized solutions.
Synopsys has acquired a logo certification for the DesignWare USB 2.0 picoPHY IP in TSMC's 28 nm procedure, providing a tough design structure that can tolerate rigorous process, temperature and voltage fluctuations. The SiWare Embedded Memory SRAMs have attained similar silicon results for TSMC's 28 nm procedure.
The Vice President of Marketing for the Solutions Group at Synopsys, John Koeter stated that the development will help users minimize integration risk and accelerate the development of differentiated SoCs.
The DesignWare PHY IP for the TSMC 28 nm process will be made available in the second quarter of 2011. Users can avail the range of SiWare Embedded Memories for the TSMC 28 nm process.
Source: http://www.synopsys.com/