Analog Bits Joins PLDA’s Ecosystem of PHY Partners

PLDA, the industry leader in PCI Express® IP solutions has added Analog Bits, the semiconductor industry’s leading provider of mixed-signal IP, to its ecosystem of PHY partners. Together, the partners have developed a silicon-proven PCIe Gen 3 solution for a leading 28nm low-power process node that offers ASIC engineers great power savings and improved performance.

“With many billions of IP products fabricated in silicon from 0.25µm to 16/14nm FinFET processes, Analog Bits has an established track record of delivering high-quality, differentiated, mixed-signal IP,” said Stephane Hauradou, co-founder and Vice-President at PLDA. “Their technology leadership empowers our customers with the competitive edge they need to deliver high-quality SoCs in a timely manner while significantly lowering their risks and costs. We are proud to welcome them into our PHY ecosystem, which is the industry’s largest.”

Analog Bits has the industry’s lowest power SERDES with the smallest area for applications like PCIe. By combining PLDA’s leadership and expertise in PCIe Controller IP with Analog Bits’ low power SERDES, the joint solution delivers extremely high performance with high-energy efficiency for SoC designs. This is especially beneficial to designs being developed for applications in mobile, storage, networking, servers, and datacenters.

“PLDA continues to be on the leading edge of PCIe controller IP and our partnership immediately reduces time-to-market for customers,” said Mahesh Tirupattur, executive vice president of Analog Bits. “Together, we deliver a reliable solution that is silicon-proven with demonstrated interoperability between the PCIe PHY and the controller.”

In addition to high performance, high configurability and the smallest possible gate count, this solution delivers:

  • A complete, reliable and highly configurable PCI-SIG compliant PCIe solution that supports endpoint, root port, switch, and bridge applications
  • The industry’s highest performance PCIe solution in terms of throughput and latency
  • Specific features for storage applications including Data Protection (ECC & ECRC), built-in CDC, L1 PM substate , SRIS support and enhanced data integrity features.

Availability

The silicon-proven complete PCIe Gen3 IP solution is available now from Analog Bits and PLDA. For more information on PLDA’a PCIe 3.0 IP solutions visit: https://www.plda.com/products/asic-soc-ip/pcie-soft-ip/pcie-30-soft-ip

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