Cadence Achieves USB-IF Certification for USB 3.0 Host IP Solution on TSMC 16nm FinFET Plus Process

Cadence Design Systems, Inc. today announced that its USB 3.0 host IP solution for TSMC’s 16nm FinFET Plus (16FF+) process is one of the first to pass USB-IF compliance testing and receive USB-IF certification.

The complete controller and PHY integrated solution is pre-verified, which enables designers to mitigate project risk and reduce system-on-chip (SoC) integration and verification time.

For more information on Cadence® IP for USB offerings, please visit: www.cadence.com/news/USBIP.

Cadence offers a complete USB 3.0 solution including the controller, PHY and verification IP. The certified USB 3.0 host solution for 16FF+ features an innovative architecture developed by FinFET design experts within Cadence and offers a 40 percent reduction in dynamic power consumption versus previous generations of the IP on other process nodes. To achieve this power reduction, the integrated USB host xHCI controller and PHY IP utilize power and clock gating in order to conserve energy as the USB protocol goes into a low-power sub-state. Additionally, the PHY is optimized to ease integration. With a reduced pinout, there are fewer combinations to verify and less complexity with fewer complex software interactions that need to be tested and debugged.

“For our mobile and consumer customers, achieving USB 3.0 host certification on 16FF+ is critical because it signifies a reliable and low-risk path toward successful, advanced-node SoC design,” said Osman Javed, product marketing director at Cadence. “The complete solution of controller, PHY and verification IP enables customers to significantly reduce integration time and get their products to market faster. Our IP solution is available in a wide range of configurations that meets the needs of our customers looking to design for both high-performance and embedded, low-power applications.”

“As a long-term member of USB Implementers Forum, Cadence delivers USB design and verification IP that reduces the integration and verification effort for today’s complex SoCs,” said Jeff Ravencraft, USB-IF President and COO. “USB-IF certification of IP on TSMC 16FF+ is a critical step to provide the industry with proven solutions to build interoperable, reliable USB products for consumers.”

Citations

Please use one of the following formats to cite this article in your essay, paper or report:

  • APA

    Cadence Design Systems. (2019, February 11). Cadence Achieves USB-IF Certification for USB 3.0 Host IP Solution on TSMC 16nm FinFET Plus Process. AZoNano. Retrieved on November 21, 2024 from https://www.azonano.com/news.aspx?newsID=32745.

  • MLA

    Cadence Design Systems. "Cadence Achieves USB-IF Certification for USB 3.0 Host IP Solution on TSMC 16nm FinFET Plus Process". AZoNano. 21 November 2024. <https://www.azonano.com/news.aspx?newsID=32745>.

  • Chicago

    Cadence Design Systems. "Cadence Achieves USB-IF Certification for USB 3.0 Host IP Solution on TSMC 16nm FinFET Plus Process". AZoNano. https://www.azonano.com/news.aspx?newsID=32745. (accessed November 21, 2024).

  • Harvard

    Cadence Design Systems. 2019. Cadence Achieves USB-IF Certification for USB 3.0 Host IP Solution on TSMC 16nm FinFET Plus Process. AZoNano, viewed 21 November 2024, https://www.azonano.com/news.aspx?newsID=32745.

Tell Us What You Think

Do you have a review, update or anything you would like to add to this news story?

Leave your feedback
Your comment type
Submit

While we only use edited and approved content for Azthena answers, it may on occasions provide incorrect responses. Please confirm any data provided with the related suppliers or authors. We do not provide medical advice, if you search for medical information you must always consult a medical professional before acting on any information provided.

Your questions, but not your email details will be shared with OpenAI and retained for 30 days in accordance with their privacy principles.

Please do not ask questions that use sensitive or confidential information.

Read the full Terms & Conditions.