Aug 1 2007
Micrologic Design Automation, Inc., an EMVELCO Company and leading provider of design for manufacturing (DFM) solutions for nanometer IC design, today announced its NanoToolBox™, nanometer productivity tools suite will adopt the industry-standard OpenAccess database, enabling tight links with Cadence Virtuoso custom design platform.
With the increasing number and complexity of design rules, rules-driven reliability aware environment has become a necessity for nanometer layout editing and custom design. VisuaLVS™ is another productivity tool to significantly shorten design cycle via automatic correction of LVS mismatches. nanoRVInteractive™ and VisuaLVS™, two of our NanoToolBox™ tools suite, greatly eases the burden on layout engineers, enabling reliability aware IC physical design environment and LVS automatic correction system. Micrologic has further simplified the design process for its customers by supporting open interoperability through OpenAccess, ensuring easy integration of nanoRVInteractive™ and VisuaLVS™ into their Cadence nanometer design flow.
"Support for OpenAccess is an integral part of our commitment to making our tools unique, must-have advantages available to as many layout engineers as possible," said Danny Rittman President of Micrologic. “Our participation on both fronts further contributes to open interoperability and ensures ease of tool integration for our mutual customers. Micrologic's decision to support the OpenAccess database is another example of the momentum behind OpenAccess and the true, open industry approach it represents, especially when it comes to complex nanometer design. Customers are benefiting from the ability to have interoperability across multiple suppliers, which can only be obtained through open initiatives like OpenAccess."
As chip feature sizes shrink into 45nm below, layout engineers face the impossible task of meeting complex reliability and DFM criteria. nanoRVInteractive™ is the first tool of its kind to provide full support for the 45nm and below technologies in real time. Unlike tools that only check for DRC and DFM violations after the layout is finished, nanoRVInteractive™ shows layout engineers how to design IC physical structures without creating reliability violations - in real time, during the layout design process. VisuaLVS™ is providing fast, efficient and timing-aware LVS mismatches automatic correction which significantly saves verification time and shortens time to market. nanoRVInteractive™ and VisuaLVS™ are an integral part of NanoToolBox™ tools suite and shares design information across other NanoToolBox™ platforms to achieve higher nanometer design efficiency and productivity.
nanoRVInteractive™ and VisuaLVS™ will be available during the fourth quarter of 2007.