Feb 19 2008
Larry W. Sumney, President and CEO of the Semiconductor Research Corporation (SRC), was joined today by Edward Reinfurt, Executive Director of the New York State Foundation for Science, Technology and Innovation (NYSTAR), and Alain E. Kaloyeros, Vice President and Chief Administrative Officer of the College of Nanoscale Science and Engineering (CNSE) at the University at Albany, in announcing that CNSE will serve as headquarters for a national research consortium aimed at enabling nanoelectronics advances that are critical for the development of smaller, faster, and cheaper computer nanochips amid the approaching limits of conventional scaling.
The Semiconductor Research Corporation (SRC), the world's leading university-research funding agency for nanoelectronics and related technologies, is designating CNSE as the home of the New York Center for Advanced Interconnect Science and Technology (NY CAIST). The $7.5 million, three-year program, which is funded jointly by SRC and New York State, begins this month. In addition to CNSE, the CAIST membership includes Columbia University, Cornell University, Lehigh University, Massachusetts Institute of Technology (MIT), Penn State, Rensselaer Polytechnic Institute (RPI), Stanford, SUNY Binghamton, University of Florida, University of Maryland, University of North Texas, University of Texas at Arlington, and the University of Texas at Austin.
"The Semiconductor Research Corporation is pleased to engage in this important partnership with NYSTAR, the College of Nanoscale Science and Engineering, and its partner universities in a program that will play a critical role in furthering progress in the semiconductor industry," said Larry W. Sumney, President and Chief Executive Officer of SRC. "The groundbreaking research undertaken by NY CAIST will enable significant developments in nanoelectronics technologies that are designed to address the strategic business needs of chip companies, foster important scientific and technical progress, and provide new opportunities for high-tech education and workforce training that are vital for the future of the semiconductor industry."
New York State Governor Eliot Spitzer said, "This achievement by CNSE demonstrates that strategic investments in our education system will help to secure New York's position as a leader in today's innovation economy. CNSE's collaboration with our leading research universities and the world's best semiconductor companies will help create the next generation of technology and keep New York at the forefront of this important evolution."
Edward Reinfurt, Executive Director of NYSTAR congratulated "Dr. Kaloyeros and his team of world class researchers at the College of Nanoscale Science and Engineering for all their work in advancing nanoelectronics research." He stated that "NYSTAR's partnership with CNSE and SRC will further strengthen New York State's commitment to further advance nanotechnology research and the nanotechnology industry within New York State."
"Working in collaboration with the Semiconductor Research Corporation, NYSTAR, and our esteemed colleagues from the nation's preeminent research universities, the UAlbany NanoCollege is privileged to lead this important endeavor designed to enable vital progress at the nanoscale that is essential to advancing the technology roadmap and serving the needs of the nation's leading computer chip companies," said Dr. Alain E. Kaloyeros, Vice President and Chief Administrative Officer at CNSE. "That this initiative is centered in New York, at a State University of New York institution, is testament to the vision, support, and investments made by Governor Spitzer and our legislative leaders, who have created a globally recognized resource in nanotechnology education, research, development and commercialization that is providing unmatched intellectual know-how and technical capabilities for the benefit of our corporate partners."
Every year, through the collective efforts of the nanoelectronics industrial and academic communities, switching speeds on chips have grown nearly 20 percent faster. However, the ability to continue this pace will eventually slow down without implementation of new interconnect materials, processes, metrology and concepts. The NY CAIST brings together a critical mass of intellectual assets and state-of-the-art infrastructure from across the U.S. for the development of innovative interconnect solutions that ensure continuation of the historical rate of evolution of the computer chip.
Interconnects, or the complex wiring architectures that control chip speed and performance, are one of the key enablers necessary to continue the aggressive pace for increasing the functionality of chips, known as Moore's Law. As part of the NY CAIST program, 27 new research projects are planned, aimed at extending copper and low-k dielectric scaling that will ultimately serve chipmakers and end-users for ultra-fast telecommunications, smart computing, electronic tether-free gaming, automotive and consumer electronics, and a wide range of other applications that are dependent on chip performance and functionality-including health care and energy.