Sep 29 2008
Virage Logic Corporation, the semiconductor industry's trusted IP partner, today announced that NextIO of Austin, Texas, having achieved first-pass silicon success using Virage Logic’s semiconductor intellectual property (IP), has expanded its license to advance to 65-nanometer (nm) process technology. NextIO has selected Virage Logic's SiWare™ 65GP High-Density Memory Compilers and the Self-Test and Repair (STAR™) Memory System for use in its next-generation product portfolio.
"As a leader in the I/O virtualization marketplace, we need to deliver advanced products that meet customers’ time-to-market requirements," said Rich Warwick, vice president of engineering and operations, NextIO. "We achieved first-pass success on our 130-nm Nexsis N2100 using Virage Logic IP and that first silicon is still in production with no changes two years later. To a startup company, first pass success is vital which means we must reduce risk with solid IP from companies like Virage Logic. Our track record combined with Virage Logic’s reputation as a trusted IP partner gave us confidence to continue using them as we moved ahead to 65nm with our new designs. Using Virage Logic's silicon-proven memory IP portfolio, we can streamline development, lower costs, control risk, and plan for faster time-to-market."
NextIO is using Virage Logic’s SiWare 65GP and DP High Density Memory Compilers, as well as the STAR Memory System, to design the 65nm next-generation NextIO I/O Virtualization (IOV) products that will be manufactured at TSMC. The aggressive design schedule calls for tape-out by the end of 2008.
"We measure our success using customer-oriented criteria, including successful first silicon, migration to more advanced semiconductor processes, and the expansion of our trusted partnerships. NextIO is accomplishing all three at once," said Brani Buric, executive vice president of marketing, Virage Logic. "We recognize the success NextIO has had with the Nexsis N2100 and are proud to partner with them as they advance into 65nm devices."
About Virage Logic SiWare Memory Compilers and STAR Memory System
Virage Logic's SiWare products help IC designers to manage the tradeoffs in performance, device area, power consumption and statistical yield to identify the optimal balance for their specific design, select the ideal solution and proceed with confidence to silicon. The STAR Memory System integrates an embedded test-and-repair infrastructure to speed system-on-chip (SoC) time-to-volume and boost the yield percentages of good die per wafer. The STAR Memory System is proven to reduce tape-out schedules for new complex SoCs by weeks to help reduce overall time-to-volume production.