Feb 17 2009
SEMATECH, a global consortium of chipmakers, and Metrosol, Inc., a leading developer, manufacturer and worldwide supplier of short wavelength optical metrology solutions, announced today that Metrosol has joined SEMATECH's Front End Process Technologies Program at the College of Nanoscale Science and Engineering (CNSE) of the University at Albany. The joint partnership will expand on current collaborative efforts to develop suitable inline metrology techniques to monitor the thickness and composition of various films in high-k dielectric gate and memory stacks.
As a member of this program, Metrosol will collaborate with experts in SEMATECH's Front End Processes (FEP) and Metrology divisions to develop and demonstrate an inline vacuum ultraviolet spectroscopic reflectometry (VUV-SR)-based platform that will provide the accurate characterization necessary for inline metrology of advanced logic and memory applications for future technology generations.
"Metrosol is positioned to make significant contributions to the development and production of advanced dielectrics for both logic and memory technologies," said Kevin Fahey, Metrosol's CEO. "Our VUV-SR technology offers the ability to simultaneously measure thicknesses and compositions of individual layers within the high-k dielectric stacks. Our high throughput provides advanced inline process control capability that allows for greater statistical sampling, more accurate information, and faster problem resolution."
"We are pleased to welcome Metrosol to the ever-expanding roster of leading industry partners engaged in cutting-edge nanoelectronics research and development at the UAlbany NanoCollege," said Richard Brilla, vice president for strategy, alliances and consortia at CNSE. "This new collaboration will enhance the world-class metrology and characterization capabilities at CNSE's Albany NanoTech, further demonstrating the success of the SEMATECH-CNSE partnership in accelerating nanoscale innovations, supporting pioneering education and fostering high-tech economic growth, all of which underscore New York's recognition as a global leader in nanotechnology."
Specifically, SEMATECH and Metrosol plan to build optical models for interfacial layers, high-k and metal gate films, and dielectric capping layers, so that reliable thickness and composition measurements may be performed inline using Metrosol's VUV-SR technology for different logic- and memory-based applications.
"This is another major step in developing practical and inline advanced physical characterization methods to support emerging technologies currently under development in SEMATECH's Front End Processes program," said Raj Jammy, SEMATECH vice president of emerging technology. "Metrosol is a strong, trusted partner, and its VUV measurement technology complements our own technical expertise, as we work together to extend CMOS logic and memory technologies."
Capable of handling multiple metrology modules on a single platform, Metrosol's VUV system provides flexibility and throughput. The platform's modular architecture and small footprint delivers high throughput inline measurement capabilities, even for advanced applications such as high N, SiON and HfO2 high-k dielectrics.
In 2007, Metrosol and SEMATECH demonstrated inline optical metrology for high-k dielectric composition, thickness, and ultra-thin interfacial layer thickness. The results, jointly presented at the 4th International Symposium on Advanced Gate Stack Technology, were obtained using Metrosol's VUV-SR metrology system and transistors manufactured with SEMATECH's HfSiOx gate technology. Rapid adoption of gate stack and memory dielectrics technology and of its use in high volume manufacturing requires suitable inline metrology techniques to monitor the thickness and composition of the various films in the dielectric stack.
The goal of SEMATECH's Front End Process Technologies Program at the UAlbany NanoCollege is to provide novel leading-edge materials, process, structural modules and electrical and physical characterization solutions to support the continued scaling of logic and memory applications.