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Cadence Solutions Selected for TSMC 20 nm Design Infrastructure

Cadence Design Systems, a leader in global electronic design innovation, announced today that TSMC has selected Cadence® solutions for its 20-nanometer design infrastructure. The solutions cover the Virtuoso® custom/analog and Encounter® RTL-to-signoff platforms.

From Cadence Design Systems 17 Oct 2012

UAlbany NanoCollege Selects M+W Group as Associate Member for Global 450 Consortium

As further demonstration of Governor Andrew Cuomo's nanotechnology-driven innovation economy and its success at attracting global corporations, M+W Group (M+W) announced today that it has been selected by the College of Nanoscale Science and Engineering (CNSE) of the University at Albany, United States, associate member for facilities and infrastructure for the Global 450mm Consortium (G450C), where M+W will spearhead development of new facility and infrastructure technologies and manage building and facility suppliers selected to participate in the G450C program.

17 Oct 2012

Laker-Calibre RealTime Integration Chosen for TSMC 20 nm Custom Design Reference Flow

SpringSoft, and Mentor Graphics® Corporation today announced that the Laker™-Calibre® RealTime custom layout flow with signoff-quality design rule checking (DRC) in real time is selected for the TSMC Custom Design Reference Flow. The Reference Flow addresses 20-nanometer (nm) chip design and verification complexity.

17 Oct 2012

Synopsys Teams Up with TSMC on 20 nm Process Technology

Synopsys, a global leader accelerating innovation in the design, verification and manufacture of chips and systems, today announced 20-nanometer (nm) process technology support for the TSMC 20nm Reference flow. This includes Synopsys® Galaxy™ Implementation Platform support for the latest TSMC 20nm design rules and models.

From Synopsys, Inc. 16 Oct 2012

Electrons Pass Through 'Invisible' Nanoparticles

A new approach that allows objects to become “invisible” has now been applied to an entirely different area: letting particles “hide” from passing electrons, which could lead to more efficient thermoelectric devices and new kinds of electronics.

From Massachusetts Institute of Technology 15 Oct 2012

New Nano-Battery Cell Smart Grid Energy Storage Technology Deployed in Kansas City

KCP&L, MRIGlobal, and Exergonix Inc. announce the installation and trial of a new smart grid energy storage technology in Kansas City.

15 Oct 2012

ATopTech Includes Place and Route Solution in TSMC's 20 nm Reference Flow

ATopTech, the leader in next generation physical design solutions, today announced that Aprisa™ and ApogeeTM, the company’s place and route solution, are included in TSMC’S 20nm Reference Flow.

11 Oct 2012

Cadence Signoff Solution Accelerates Development Schedule of 28 nm System-on-Chip

Cadence Design Systems, Inc., a leader in global electronic design innovation, announced today that STMicroelectronics, a global semiconductor leader serving customers across the spectrum of electronics applications, slashed multiple weeks from its design schedule on a 28-nanometer system-on-chip (SoC) by switching to the Cadence® signoff solution.

11 Oct 2012

ON Semiconductor Now Provides Digital Products in 65 and 40 nm Process Technologies

ON Semiconductor, a premier supplier of high performance silicon solutions for energy efficient electronics, in collaboration with key foundry partners, now offers a broad portfolio of digital products in 65 nanometer (nm) and 40 nm process technologies.

9 Oct 2012

Altera Expands 28 nm Portfolio by Launching Arria V GZ Variant

Altera Corporation today announced it has expanded its 28 nm portfolio with the introduction of the Arria® V GZ variant, incorporating the company's industry-leading transceiver technology and delivering an overall core performance boost of more than two speed grades, or 30 percent.

9 Oct 2012