ProPlus Design Solutions, Inc. today announced that eSilicon Corporation, a leading independent semiconductor design and manufacturing solutions provider, has selected its high-performance parallel SPICE simulator and its variation analysis platform for advanced intellectual property (IP) designs at 28-nanometer (nm), 16nm and beyond.
Xilinx, Inc. today announced Vivado® Design Suite early access support for the 16nm UltraScale+™ portfolio, including Zynq® UltraScale+ and Kintex® UltraScale+ devices. The Vivado early access release has been co-optimized with the UltraScale+ ASIC-class programmable logic to exploit the full advantages of production UltraScale+ devices, leveraging the complete catalog of SmartCORE™ and LogiCORE™ IP.
Researchers have developed an innovative technique that makes it possible to self-organize and customize complicated structures at the nanoscale. This breakthrough was facilitated through an international collaboration headed by IBM and the University of Cambridge. The study paves the way to customize material properties and functionalities for a variety of semiconductor device applications.
Nanotechnology is a growing interdisciplinary technology that is often seen as a new industrial revolution. Nanotechnology is increasingly attracting worldwide attention owing to its wide range of end-uses. As nanotechnology is evolving, so is the scope for its commercial expansion.
DNA, the molecular foundation of life, has new tricks up its sleeve. The four bases from which it is composed snap together like jigsaw pieces and can be artificially manipulated to construct endlessly varied forms in two and three dimensions. The technique, known as DNA origami, promises to bring futuristic microelectronics and biomedical innovations to market.
A team of scientists at the Max Planck Institute for Polymer Research (MPI-P) discovered that electrical conduction in graphene on the picosecond timescale – a picosecond being one thousandth of one billionth of a second – is governed by the same basic laws that describe the thermal properties of gases. This much simpler thermodynamic approach to the electrical conduction in graphene will allow scientists and engineers not only to better understand but also to improve the performance of graphene-based nanoelectronic devices.
A technique devised by UCLA researchers could help scientists better understand a tiny — but potentially important — component of next-generation electronic devices.
Entegris, Inc., a leader in yield-enhancing materials and solutions announced today the release of Torrento® X Series 7 nm filters with FlowPlane™ linear filtration technology. FlowPlane is the semiconductor industry's first scalable, linear, high-flow filtration platform enabling advanced wet cleaning applications for the 10 nm node and beyond. The first in a series of filters based on the linear filtration technology, the FlowPlane S model is designed for point of dispense (POD) applications, enabling improvements in both on-wafer defectivity and yield for critical wet cleaning applications.
Nano-electronics research center imec announced today at SEMICON West that it has demonstrated concept and feasibilityfor pore-sealing low-k dielectrics in advanced interconnects. The method, based on the self-assembly of an organic monolayer, paves the way to scaling interconnects beyond N5.
Today, at SEMICON WEST 2015 (San Francisco), world-leading nano-electronics research center imec and Besi, a global equipment supplier for the semiconductor and electronics industries announced that they have jointly developed an automated thermocompression solution for narrow-pitch die-to-wafer bonding, a method by which singulated dies are stacked onto bottom dies which are still part of a fully intact 300mm wafer. The solution features high accuracy and high throughput, paving the way to a manufacturable 2.5D, 3D, and 2.5D/3D hybrid technology.
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