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TSMC Certifies Cadence Quantus QRC Extraction Solution for TSMC 16nm FinFET

Cadence Design Systems, Inc., a leader in global electronic design innovation, today announced that TSMC has certified Cadence Quantus QRC Extraction solution for TSMC 16nm FinFET. Cadence Quantus QRC Extraction Solution successfully passed TSMC's rigorous parasitic extraction certification requirements to achieve best-in-class accuracy against the foundry golden data for FinFET technology.

From Cadence Design Systems 15 Jul 2014

Novel Nanotech Microchip for Diagnosis of Type-1 Diabetes

An inexpensive, portable, microchip-based test for diagnosing type-1 diabetes could improve patient care worldwide and help researchers better understand the disease, according to the device's inventors at the Stanford University School of Medicine.

14 Jul 2014

Rice Employs Nanoporous Silicon-Oxide Material in New RRAM Memory Devices

Rice University's breakthrough silicon oxide technology for high-density, next-generation computer memory is one step closer to mass production, thanks to a refinement that will allow manufacturers to fabricate devices at room temperature with conventional production methods.

11 Jul 2014

SUNY CNSE/SUNYIT and SEMATECH Create Chemical Mechanical Planarization Center

The newly merged SUNY College of Nanoscale Science and Engineering (CNSE) / SUNY Institute of Technology (SUNYIT) and SEMATECH today announced the creation of the Chemical Mechanical Planarization (CMP) Center, based at the Albany Nanotech Complex.

From College of Nanoscale Science and Engineering, University at Albany 11 Jul 2014

Nano for Security & Defense International Conference to be Held in September 2014 in Spain

Nano for Security & Defense International Conference (NanoSD2014) will be held in Avila, Spain (September 23-26, 2014) – designated by UNESCO a World Heritage City in 1985. The conference will provide an opportunity to discuss general issues and important impacts of nanotechnology in the development of security and defense.

11 Jul 2014

Researchers Develop Highly Efficient Holography Based on Nanoantennas

Tel Aviv University researchers develop holography technology that could change the way we view the world

10 Jul 2014

Synopsys DesignWare AEON Trim NVM IP Available for High-Voltage Processes

Synopsys, Inc., a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today announced the availability of the DesignWare AEON Trim NVM IP for high-voltage processes. The new IP is up to 75 percent smaller than alternative NVM IP solutions, helping to reduce the size and cost of automotive ICs.

From Synopsys, Inc. 10 Jul 2014

Cascade Microtech Launches Waveguide Probes for On-Wafer Probing of Sub-Millimeter Wave Circuits

Cascade Microtech, Inc., a leading supplier of solutions that enable precision measurements of integrated circuits at the wafer level, today announced the launch of the T-Wave series of waveguide probes for on-wafer probing of millimeter wave and sub-millimeter wave circuits.

From FormFactor 9 Jul 2014

FinScale Offers qFinFET 3D MOSFET Architecture and Manufacturable Process

FinScale Incorporated,the semiconductor device and process innovation company, today announced immediate availability of its qFinFET™ technology, a next generation 3D MOSFET architecture and manufacturable process readily transferable to foundries and integrated device manufacturers.

9 Jul 2014

Hitachi employs Cadence Tempus Timing Signoff Solution to Tape Out 28nm Design

Cadence Design Systems, Inc., a leader in global electronic design innovation, today announced that Hitachi has taped out its latest giga-scale design using the Cadence Tempus™ Timing Signoff Solution. Hitachi also utilized Tempus Timing Signoff Optimization (TSO), resulting in a reduction of their overall closure time to just 3 weeks down from almost 2 months.

From Cadence Design Systems 8 Jul 2014