Electronic Design Automation (EDA) company, Silicon Frontline Technology in its verification of post-layout solutions focused on nanometer design applications, and will participate in events through May and June, including the 23rd International Symposium On Power Semiconductor Devices and ICs (ISPSD) and the 48th Design Automation Conference (DAC) in San Diego, and the International Image Sensor Workshop (IISW) in Hokkaido, Japan.
Dr. Maxim Ershv, chief technical officer of SFT, will present a paper on Physics, Challenges, and Solutions of Metal Layout Designs for Large Area Power Devices at ISPSD. The company will unveil its Guaranteed Accurate products, F3D (Fast 3D) and R3D (Resistive 3D), and its product line at DAC. Dr. Ershov will present a paper written along with authors from its customer, Aptina titled Accurate capacitance and RC extraction software tool for pixel, sensor and precision analog designs.
The ISPSD'11 will be held at the Paradise Point Resort in San Diego, California on May 22, while the DAC will take place at the San Diego Convention Center in San Diego from June 6 through 8. The IISW will take place from June 8 to 11 at the Ônuma Quasi-National Park in Hokkaido, Japan.