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Judges Select 65 nm Process-Based Lattice MachXO2 PLD Family as a Finalist in Elektra 2011

Lattice Semiconductor has announced that its low power 65-nm process-based Lattice MachXO2 PLD family with embedded flash technology has been selected as a finalist in the ‘Digital Semiconductor Product of the Year’ category by an independent panel of judges of Elektra 2011, a competition of the European Electronics Industry Awards.

The winners will be declared at an Elektra Awards Dinner and Christmas Party to be conducted on December 14 2011 at the Park Plaza located in Westminster Bridge in London.

The MachXO2 family offers a unique combination of low power, minimum cost and superior system integration in one device for low density programmable logic device (PLD) designers. It delivers 10 times more embedded memory, 3 times more logic density, over 100 times reduction in static power down to 19 µW and a cost reduction of up to 30% when compared with earlier versions. These tools are suitable for low power applications, including digital cameras, GPS devices and smart phones, and control PLD applications in high end medical, high end industrial, computing and telecom infrastructure.

The Vice President of Corporate Marketing at Lattice Semiconductor, Doug Hunter stated that this prestigious acknowledgment from the judges of Elektra 2011 is very exciting. The company’s MachXO2 PLD series has gained wide acceptance from its customers for both consumer and system applications, he said. The company recently announced the availability of its MachXO2 devices in ultra-compact wafer level chip scale packages of 2.5 x 2.5 nm, which allows them to handle consumer applications previously not possible by PLDs, he added.

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