Sep 5 2008
Presto Engineering, Inc., a provider of product engineering services to the semiconductor industry, announced today that it has established a collaborative business development alliance with the Micromanipulator Company, which will enhance access to its wafer-level advanced in-silicon analysis services for customers needing 300 millimeter wafer probing support. Micromanipulator, Carson City, Nev., is a leading supplier of analytic probing solutions for semiconductor wafer testing. Through this alliance, Micromanipulator and Presto can offer probing support services to integrated device manufacturers (IDMs) and fabless semiconductor manufacturers, which are broadly represented in Silicon Valley. Under this agreement, the Presto facilities in San Jose, Calif., will also serve as a product demonstration site for Micromanipulator.
“One of the critical needs of our customers is for advanced probing solutions for 300mm wafers, especially for fabless companies looking to conduct thorough wafer-level characterization prior to packaging,” said Michel Villemain, Presto’s CEO. “Within days of installation of the P300J from Micromanipulator, we successfully commenced 12-inch wafer probing on a customer’s new 65nm design, utilizing the advanced control and thermal features of the station. We are very pleased to offer this additional capability here at our lab.”
Frank Gazzano, president of Micromanipulator, commented, “As we continue to expand the worldwide adoption of our P300A and P300J 300mm systems, we are pleased to partner with a firm like Presto Engineering, which shares our focus on applications development to meet the reliability, product integration and failure analysis requirements among our IDM and fabless semiconductor customer base.”
The alliance emphasizes the importance of Presto Engineering’s in-silicon analysis capabilities as part of the company’s Design Success AnalysisTM offering for process technologies down to the 45nm node. In-silicon analysis includes: emission- and laser-based power, leakage and interconnect characterization; internal timing measurement; and focused ion-beam (FIB) circuit edit. With the increase in the number of interconnect layers, this analysis is facilitated by access to the transistor level from the backside (silicon-side) of the wafer.