Valid Alternative to Reduce Variability Issues at 22nm and Below

CEA-LETI has demonstrated a breaking record for device matching characteristics with an AVt of around 1mV.µm, well below those obtained in bulk Si technologies, while still maintaining excellent Ion and Ioff characteristics. The threshold voltage variation (?Vt) of less than 40mV across wafer is also reported for 25nm gate length Fully Depleted SOI (FDSOI) devices using undoped channel and high-k and metal gates technology.

The work, carried out together with ST Microelectronics and SOITEC within the frame of the MEDEA+ DECISIF project, made use of the SOI process flow available in the CEA-LETI facilities in Grenoble. The device results indicated that the undoped channel FDSOI device with high-k/metal gate stack is a valid alternative to reduce variability issues at 22nm and below.

Comprehensive results of the influence of Si thickness, strain and process on the variability will be presented at the IEDM 2008 conference in December, where CEA-LETI will participate with over 10 papers on different aspects of nanotechnologies, advanced devices and process integration.