Nanofabrication News

RSS

Cadence Introduces Memory Model for LPDDR5 Standard

Cadence Design Systems, Inc., today announced the Cadence® Memory Model for the LPDDR5 standard. This new verification IP (VIP) product enables engineers to verify that system-on-chip (SoC) designs are compliant with the JEDEC interface standard, and that they can operate correctly in a system with the actual memory components. Validation of designs using the LPDDR5 memory model reduces the risk of mistakes, rework and delayed production, leading to faster production ramp-up and higher product quality.

From Cadence Design Systems 13 Oct 2015

Spectronics Introduces Advanced PC-10020-LT UV EPROM/Wafer Erasing System

Whether a technician is erasing one EPROM chip or many, Spectronics Corporation manufactures the latest, most advanced, reliable UV EPROM erasing equipment in the world.

9 Oct 2015

1366 Technologies to Build Commercial Solar Direct Wafer Manufacturing Facility in Genesee County New York

1366 Technologies today announced plans to build a state-of-the-art, commercial solar wafer manufacturing facility in Genesee County New York, strategically located between Buffalo and Rochester, that will eventually scale to 3 GW, house 400 Direct Wafer™ furnaces, and produce more than 600 million high-performance silicon wafers per year – enough to power 360,000 American homes.

8 Oct 2015

3M Licenses Lotus’s TransFlexALD Spatial Atomic Layer Deposition Technology

3M has entered into a licensing agreement with Lotus Applied Technology to access Lotus’s TransFlexALDTM spatial Atomic Layer Deposition (ALD) and barrier materials patent portfolio.

8 Oct 2015

Aehr Test Systems Receives First Order for New FOX-XP Test and Burn-In System

Aehr Test Systems, a worldwide supplier of semiconductor test and burn-in equipment, today announced the company has received its first order for its FOX-XP Wafer Level Test and Burn-in System including multiple FOX-XP WaferPak Contactors and application development services.

8 Oct 2015

Cadence and imec Complete First Tapeout of 5nm Test Chip using EUV and 193i Lithography

Nano-electronics research center imec and Cadence Design Systems, Inc. today announced that the companies completed the first tapeout of a 5nm test chip using extreme ultraviolet (EUV) as well as 193 immersion (193i) lithography.

8 Oct 2015

Nanophase Awarded U.S. Patent for C3 Metal Oxide Surface Treatment Technology

Nanophase Technologies Corporation announced today that it has been granted U.S. patent 9,139,737 for its C3 metal oxide surface treatment technology. Patents in other countries are pending.

8 Oct 2015

Collaboration to Develop Fluorescence Immunoassays Based on Metal Enhanced Fluorescence

In course of the Basel Life Science Week 2015 Sony DADC BioSciences and FIANOSTICS GmbH announced a collaboration on highly sensitive and rapid fluorescence immunoassays using a novel polymer/metal hybrid for the use in metal-enhanced fluorescence (MEF). Sony DADC uses its well established manufacturing processes derived from Blu-ray disc production.

7 Oct 2015

Practical Method to Create Nano-Electronic Devices One Atomic Layer at a Time

The field of quantum mechanics deals with materials at atomic dimensions, and big discoveries often happen at a very small scale. Researchers in the Erik Jonsson School of Engineering and Computer Science, in collaboration with an international team of engineers and scientists, have uncovered a phenomenon that could have major implications for the development of nano-electronic circuits and devices.

5 Oct 2015

Fabricating Devices Directly on Silicon with Magnetic Tunnel Junctions Could Minimize Problem of Overheating

The choice for energy-efficient technologies is not a matter of price choice but it is slowly turning into a matter of heat.

5 Oct 2015

Nanofabrication News

Cadence Introduces Memory Model for LPDDR5 Standard

Spectronics Introduces Advanced PC-10020-LT UV EPROM/Wafer Erasing System

1366 Technologies to Build Commercial Solar Direct Wafer Manufacturing Facility in Genesee County New York

3M Licenses Lotus’s TransFlexALD Spatial Atomic Layer Deposition Technology

Aehr Test Systems Receives First Order for New FOX-XP Test and Burn-In System

Cadence and imec Complete First Tapeout of 5nm Test Chip using EUV and 193i Lithography

Nanophase Awarded U.S. Patent for C3 Metal Oxide Surface Treatment Technology

Collaboration to Develop Fluorescence Immunoassays Based on Metal Enhanced Fluorescence

Practical Method to Create Nano-Electronic Devices One Atomic Layer at a Time

Fabricating Devices Directly on Silicon with Magnetic Tunnel Junctions Could Minimize Problem of Overheating

Nanopore-Based Sensor Enables Rapid and Precise Disease Diagnosis

Multiscale Force Sensing with Photon-Avalanching Nanocrystals

Novel Method for Producing Superior Carbon Nanofibers via Additive Nanostructuring

Optimizing Methylene Blue Removal with Bovine Serum Albumin Nanoparticles

Harnessing Biology for Sustainable Energy Production

Conversations on AFM: Applications of BioAFM in Life Science

Conversations on AFM: The Technology and History Behind AFM and SPM

Recent Advances in High-Speed Atomic Force Microscopy to Improve Research Into Protein Dynamics

Sponsored Content

Characterization of Active Pharmaceutical Ingredients, Injectables, and Proteins

The Future of Wound Care: Why Nanofibers are Key to Accelerated Healing

The Evolution of Lipid Nanoparticles

How Emulsion Electrospinning is Transforming Materials