DEK Developed System Specifically for Processing Thinned Silicon Wafers

Building on its highly successful Galaxy imaging platform, DEK has used the foundation of the technology's supreme accuracy and precision to develop a system specifically for processing thinned silicon wafers. The new Galaxy Thin Wafer System offers exceptional stability, enhanced process capability of Cp>2 @ +/- 12.5µm and advanced speed and acceleration control to ensure robust processing of today's delicate wafer products.

Central to the outstanding process capability of the Galaxy Thin Wafer System is an expertly engineered wafer pallet that delivers the support and stability required to properly secure wafers as thin as 75µm during transport and processing. Approximately 400mm square, the DEK wafer pallet is flat to less than 10µm and can accommodate wafers as large as 300mm. The careful selection and use of porous materials ensures that thinned wafers can be held securely while being successfully processed with any one of today's most sophisticated packaging techniques, including DirEKt Ball Placement™, DirEKt Coat™ wafer backside coating, protective coating imaging, thermal interface materials deposition, wafer bumping and encapsulation. The new pallet technology also delivers versatility, as it is capable of supporting wafers of varying sizes and thicknesses.

With a robust rail system and precision transport technology, the Galaxy Thin Wafer System provides the support and movement control required to accommodate transfer of the wafer-loaded pallet into and out of the mass imaging platform. The system's toothed, flat belts are driven by a servo motor and supply the large contact area critical for support and stability of the wafer pallet, offering unmatched control of its speed, acceleration and positioning.

On board the Galaxy Thin Wafer System, DEK's award-winning DirEKt Coat™ process for deposition of 25µm thick die attach adhesives and other coatings now boasts a process capability of Cp>2 @ +/- 12.5µm and a Total Thickness Variation (TTV) as low as 7µm on 150µm thin wafers as large as 200mm in diameter. Additional process extension afforded by the new system includes high first pass yield ball placement of 200µm spheres at 3000µm pitch, precision thermal interface materials deposition and wafer bumping, among others.

"The next-generation Galaxy Thin Wafer System provides a high-speed, high-accuracy alternative to traditional thinned wafer materials deposition methods," explains David Foggie, DEK Semiconductor and Alternative Applications Manager. "With the ability to host a variety of processes from wafer coatings to ball placement through to encapsulation – all with exceptional precision on 75µm thin wafers – the Galaxy Thin Wafer System is pushing the processing envelope for modern semiconductor applications, but we're far from finished."

As the key development platform for the progression of advanced semiconductor applications, the roadmap for the Galaxy Thin Wafer System is ambitious, but not outside of the scope of DEK's innovative technology expertise. Repeatable 50µm wafer imaging, high-yield sub-100µm sphere placement, innovative use of alignment algorithms and vision systems that will provide the ability to align wafers with no unique fiducial marks are all current priorities.

"We're looking three to five years down the road and designing a system today that is future-capable," concludes Foggie. "Customers want technologies to evolve alongside their ever-changing requirements and DEK's Galaxy Thin Wafer System does just that."

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