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Innovative Technique to Control Electrical Conductivity of Graphene

Researchers at the Nanoelectronics Research Institute of the National Institute of Advanced Industrial Science and Technology (AIST), in joint work with a NIMS team headed by Dr. Kazuhito Tsukagoshi, a MANA Principal Investigator at the NIMS International Center for Materials Nanoarchitectonics, developed a novel technique for controlling the electrical conductivity of graphene.

Abstract

A team headed by Dr. Shu Nakaharai, a Designated Intensive Researcher at the Collaboration Research Team Green Nanoelectronics Center (hereinafter, GNC; Leader: Naoki Yokoyama), Nanoelectronics Research Institute (Director: Seigo Kanemaru), National Institute of Advanced Industrial Science and Technology (hereinafter, AIST; President: Tamotsu Nomakuchi), and Dr. Shinichi Ogawa, an Invited Researcher at the Nanoelectronics Research Institute, AIST Innovation Center for Advanced Nanodevices (Director: Hiroyuki Akinaga), in joint research with a team headed by Dr. Kazuhito Tsukagoshi, a MANA Principal Investigator at the International Center for Materials Nanoarchitectonics (hereinafter, WPI-MANA; Director-General: Masakazu Aono), National Institute for Materials Science (hereinafter, NIMS; President: Sukekatsu Ushioda), developed a novel technique for controlling the electrical conductivity of graphene.

In the technique developed in this research, a helium ion beam is irradiated on graphene using a helium ion microscope to artificially introduce a low concentration of crystal defects, and it becomes possible to modulate the movement of electrons and holes in the graphene by applying a voltage to the gate electrode. Although this phenomenon of conduction control by introduction of crystal defects had been predicted theoretically, there were no examples in which on/off operation at room temperature was achieved experimentally. It is possible to introduce the technique developed in this work in the existing framework of production technology, including large area wafers.

Details of this technology were presented at the 2012 International Conference on Solid State Devices and Materials (SSDM2012) held in Kyoto, Japan September 25-27, 2012.

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