Jul 24 2013
United Microelectronics Corporationand SuVolta, Inc., today announced joint technology development of a 28nm process that integrates SuVolta’s Deeply Depleted Channel™ (DDC) transistor technology into UMC's 28nm High-K Metal Gate (HKMG) high-performance mobile (HPM) process.
SuVolta and UMC are working together to take advantage of implementing DDC transistor technology to reduce leakage power and improve SRAM low-voltage performance.
The companies also announced that the process technology will enable a highly flexible adoption method:
- A “DDC PowerShrink™ low-power platform” option for the ultimate power and performance benefit, where all transistors utilize the DDC technology;
- A “DDC DesignBoost transistor swap” option that works with existing design databases where a subset of transistors are replaced with DDC transistors. Typical applications of this option are replacing the leakier transistors with DDC transistors that could cut leakage, or replacing the SRAM bitcell transistors with DDC transistors to improve performance and lower minimum operating voltage (Vmin)
“In the next weeks and months, we expect to see promising results from joint technology development with SuVolta to further validate the power and performance benefits of the DDC technology in UMC’s 28nm HKMG process,” said T.R. Yew, vice president of Advanced Technology Division at UMC. “By incorporating SuVolta’s advanced technology into our HKMG process, we intend to deliver a 28nm mobile computing process platform to complement our existing Poly-SiON and HKMG technologies.”
“UMC and SuVolta teams continue to make excellent progress integrating DDC technology into UMC’s 28nm process. Working together, we are developing a process that makes for easy porting of UMC’s customers’ designs,” said Bruce McWilliams, president and CEO of SuVolta. “In addition, SuVolta is advancing future generations of mobile devices by providing the industry with an alternative to more costly and technically challenging process technologies.”