A provider of logic non-volatile memory (LNVM) one-time programmable (OTP) memory IP cores for utilization in standard-logic CMOS processes, Sidense has declared that its SiPROM 1T-Fuse OTP macro products available at 130nm has passed the TSMC’s IP9000 assessment requirements.
Patented Split-Channel Cell of 1T-Fuse bit
SiPROM macros are antifuse-based, field-programmable OTP memory macros developed using Sidense's advanced 1T-Fuse architecture that results in a single-transistor, area-efficient bit cell. The company provides a total family of ready-to-use 130nm macros addressing bit counts ranging from 8 to 512 Kb. The macro family at 130nm has been utilized by buyers for storing secure keys, replacing ROM, and for handling configuration-specific data in several applications such as PC camera controllers, digital power management, HDMI, USB, and authentication.
In the past four quarters, the company has licensed its 1T-Fuse-based OTP macro products available from 40 to 180 nm to more than 70 new designs of customers. This achievement illustrates the rapid acceptance of Sidense's 1T-OTP macro products in the semiconductor industry to use this as the key in the manufacture of several devices.
Vice President of Operations at Sidense, Rhéal Gervais, stated that since large numbers of OTP products will meet the requirements of the IP9000 Assessment Program in the forth-coming months, the company provides assurance to TSMC customers that Sidense’s 1T-Fuse-based OTP will fulfill quality requirements with respect to a broad range of variants and process nodes.